1. Field of the Invention
The present invention relates to a memory device having a refresh function. More particularly, it relates to a memory device for performing a refresh operation under an active mode such as a read mode or a write mode.
2. Description of the Prior Art
In general, data stored in a memory cell within a memory device (particularly like a DRAM) are lost by a leakage current if a predetermined time lapses due to a incomplete capacitance component. At this time, if a re-write operation of rewriting the stored data is performed before the data are completely lost, the data are safely maintained, this is called a refresh operation.
FIG. 1 is a cell array structure of a conventional DRAM. In the conventional DRAM shown in FIG. 1, due to a data jam, a normal operation is not performed under an active mode such as a read mode or a write mode. In order to perform a refresh operation, the conventional DRAM stops the active mode and then performs the refresh operation. Accordingly, an effective bandwidth (i.e., an effective processing time) for a normal operation of a memory device becomes reduced.